1. Field of the Invention
The invention relates to a method to reduce the pin count on an Integrated Circuit (IC) and in particular a method for enabling a plurality of functions of an IC to be controlled on a single pin of said IC and apparatus incorporating an IC having an accordingly reduced pin count.
2. Description of the Related Art
As original equipment manufacturers of low cost consumer equipment are continually facing greater competition, there is drive to reduce printed circuit board (PCB) space and component costs in general. There is also a desire to use one component in several configurations, in a number of products. Therefore, it is desired that application-specific integrated circuits (ASIC) have fewer pins and more configurability.
FIG. 1a illustrates a prior art pin saving scheme, for a stereo audio digital-to-analog conversion (DAC) device having a three-wire serial interface comprising serial data (SDATA), serial data clock (SCLK) and left/right clock (LRCK) terminals. This arrangement allows at least one pin of said three-wire serial interface to be able to receive and differentiate between at least one of a plurality of functions.
In a known embodiment of the scheme of FIG. 1a, the SCLK terminal is also used to control de-emphasis filtering. In this case, should less than an arbitrary predetermined number of transitions be seen on the SCLK terminal during a left/right clock cycle, an internal serial clock is generated. This internal clock is used in place of the serial data clock in order to clock the serial data inputted on the SDATA pin, while the SCLK terminal is used for control of the de-emphasis filters. Alternatively, should more than an arbitrarily predetermined number of transitions be seen on SCLK terminal during a left/right clock cycle, it is assumed that this is a normal (external) serial data clock and the de-emphasis feature is disabled until the device is reset by a power cycle.
It should be noted that the above scheme has the scope to allow further configuration of the device. The device could be designed to recognise a multi-bit data sequence on the SCLK terminal at left/right clock rate. This could be used, for example, to change the serial data format or place the device into test mode. This configuration capability can be made available from power-up until the user presents an external serial clock.
The scope of the prior art also extends to DACs which combine the re-use of at least one of the three-wire serial interface pins in order to receive and differentiate between several functions, with an additional input terminal. The DAC recognises a data sequence on said additional input terminal as one or more of the group consisting of programming data and test data, and recognises a persistent logic level as data which is not programming data. An example of this is illustrated in FIG. 1b. 
In a first aspect of the invention there is provided a method for enabling a plurality of functions of an integrated circuit to be controlled on a single pin of the circuit, the method comprising:                providing each of the plurality of functions with a designated periodically recurring sampling instance during which time the status of a signal on the single pin will be considered to relate to the function designated to that sampling instance; and        controlling each of the plurality of functions according to the status of the signal on the single pin during each of the plurality of functions' corresponding designated sampling instance.        
In a further aspect of the invention there is provided an integrated circuit having a plurality of pins operable such that a plurality of functions can be controlled on a single pin, the circuit comprising:                means for providing each of the plurality of functions with a designated periodically recurring sampling instance during which time the status of a signal on the single pin will be considered to relate to the function designated to that sampling instance; and        means for obtaining separate control signals for each of the functions from the signal on the single pin in order to enable control of each of the plurality of functions according to the status of the signal on the single pin during each of the plurality of functions' corresponding designated sampling instance.        
In a yet further aspect of the invention there is provided a method for enabling a plurality of functions of an integrated circuit to be controlled on a single pin of the circuit, the method comprising:                providing each of the plurality of functions with a designated periodically recurring timeslot during which time the status of a signal on the single pin will be considered to relate to the function designated to that timeslot; and        controlling each of the plurality of functions according to the status of the signal on the single pin during each of the plurality of functions' corresponding designated timeslot.        
Other optional features of the invention are as described in the appended claims.